Improving Transactional Memory Performance for Irregular Applications
| dc.centro | E.T.S.I. Informática | es_ES |
| dc.contributor.author | Pedrero-Luque, Manuel | |
| dc.contributor.author | Gutiérrez-Carrasco, Eladio Damián | |
| dc.contributor.author | Romero-Montiel, Sergio | |
| dc.contributor.author | Plata-González, Óscar Guillermo | |
| dc.date.accessioned | 2015-06-11T07:19:33Z | |
| dc.date.available | 2016-06-11T04:00:03Z | |
| dc.date.created | 2015 | |
| dc.date.issued | 2015-06-11 | |
| dc.departamento | Arquitectura de Computadores | |
| dc.description | Postprint de autor publicado posteriormente con este DOI:http://dx.doi.org/10.1016/j.procs.2015.05.398 | es_ES |
| dc.description.abstract | Transactional memory (TM) offers optimistic concurrency support in modern multicore archi- tectures, helping the programmers to extract parallelism in irregular applications when data dependence information is not available before runtime. In fact, recent research focus on ex- ploiting thread-level parallelism using TM approaches. However, the proposed techniques are of general use, valid for any type of application. This work presents ReduxSTM, a software TM system specially designed to extract maxi- mum parallelism from irregular applications. Commit management and conflict detection are tailored to take advantage of both, sequential transaction ordering to assure correct results, and privatization of reduction patterns, a very frequent memory access pattern in irregular applications. Both techniques are used to avoid unnecessary transaction aborts. A function in 300.twolf package from SPEC CPU2000 was taken as a motivating irregular program. This code was parallelized using ReduxSTM and an ordered version of TinySTM, a state-of-the-art TM system. Experimental evaluation shows that ReduxTM exploits more parallelism from the sequential program and obtains better performance than the other system. | es_ES |
| dc.description.sponsorship | Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech. | es_ES |
| dc.identifier.uri | http://hdl.handle.net/10630/9889 | |
| dc.language.iso | eng | es_ES |
| dc.relation.eventdate | June, 2015 | es_ES |
| dc.relation.eventplace | Reykjavík, Iceland | es_ES |
| dc.relation.eventtitle | International Conference On Computational Science, ICCS 2015 | es_ES |
| dc.rights.accessRights | open access | es_ES |
| dc.subject | Arquitectura de ordenadores | es_ES |
| dc.subject.other | Irregular applications | es_ES |
| dc.subject.other | Transactional memory | es_ES |
| dc.subject.other | Thread-level speculation (TLS) | es_ES |
| dc.subject.other | Reduction operations | es_ES |
| dc.title | Improving Transactional Memory Performance for Irregular Applications | es_ES |
| dc.type | conference output | es_ES |
| dspace.entity.type | Publication | |
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| relation.isAuthorOfPublication | f3eeec7d-5b4e-4ca9-abad-3cb620f46252 | |
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| relation.isAuthorOfPublication | 34b85e22-88ce-4035-a53e-2bafb0c3310b | |
| relation.isAuthorOfPublication.latestForDiscovery | b3d821ff-c24d-45b0-bf0a-8e689eb8f2f2 |
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