A Crypto Accelerator of Binary Edward Curves for Securing Low-Resource Embedded Devices.
| dc.centro | E.T.S.I. Telecomunicación | es_ES |
| dc.contributor.author | Sajid, Asher | |
| dc.contributor.author | Sonbul, Omar S. | |
| dc.contributor.author | Rashid, Muhammad | |
| dc.contributor.author | Raza Jafri, Atif | |
| dc.contributor.author | Arif, Muhammad | |
| dc.contributor.author | Zia, Muhammad Yousuf Irfan | |
| dc.date.accessioned | 2024-07-18T11:05:59Z | |
| dc.date.available | 2024-07-18T11:05:59Z | |
| dc.date.issued | 2023-07-26 | |
| dc.departamento | Ingeniería Eléctrica | |
| dc.description.abstract | This research presents a novel binary Edwards curve (BEC) accelerator designed specifically for resource-constrained embedded systems. The proposed accelerator incorporates the fixed window algorithm, a two-stage pipelined architecture, and the Montgomery radix-4 multiplier. As a result, it achieves remarkable performance improvements in throughput and resource utilization. Experimental results, conducted on various Xilinx Field Programmable Gate Arrays (FPGAs), demonstrate impressive throughput/area ratios observed for GF(2233). The achieved ratios for Virtex-4, Virtex-5, Virtex-6, and Virtex-7 are 12.2, 19.07, 36.01, and 38.39, respectively. Furthermore, the processing time for one-point multiplication on a Virtex-7 platform is 15.87 μs. These findings highlight the effectiveness of the proposed accelerator for improved throughput and optimal resource utilization | es_ES |
| dc.description.sponsorship | This research presents a novel binary Edwards curve (BEC) accelerator designed specifically for resource-constrained embedded systems. The proposed accelerator incorporates the fixed window algorithm, a two-stage pipelined architecture, and the Montgomery radix-4 multiplier. As a result, it achieves remarkable performance improvements in throughput and resource utilization. Experimental results, conducted on various Xilinx Field Programmable Gate Arrays (FPGAs), demonstrate impressive throughput/area ratios observed for GF(2233). The achieved ratios for Virtex-4, Virtex-5, Virtex-6, and Virtex-7 are 12.2, 19.07, 36.01, and 38.39, respectively. Furthermore, the processing time for one-point multiplication on a Virtex-7 platform is 15.87 μs. These findings highlight the effectiveness of the proposed accelerator for improved throughput and optimal resource utilization | es_ES |
| dc.identifier.citation | Sajid, A., Sonbul, O. S., Rashid, M., Jafri, A. R., Arif, M., & Zia, M. y. I. (2023). A Crypto Accelerator of Binary Edward Curves for Securing Low-Resource Embedded Devices. Applied Sciences, 13(15), 8633. https://doi.org/10.3390/app13158633 | es_ES |
| dc.identifier.doi | 10.3390/app13158633 | |
| dc.identifier.uri | https://hdl.handle.net/10630/32237 | |
| dc.language.iso | eng | es_ES |
| dc.publisher | MDPI | es_ES |
| dc.rights | Atribución 4.0 Internacional | * |
| dc.rights.accessRights | open access | es_ES |
| dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | * |
| dc.subject | Criptografía (Informática) | es_ES |
| dc.subject.other | Elliptic curve cryptography | es_ES |
| dc.subject.other | Binary Edward curve | es_ES |
| dc.subject.other | Scalar multiplication | es_ES |
| dc.subject.other | Montgomery radix-4 multiplier | es_ES |
| dc.subject.other | FPGA | es_ES |
| dc.title | A Crypto Accelerator of Binary Edward Curves for Securing Low-Resource Embedded Devices. | es_ES |
| dc.type | journal article | es_ES |
| dc.type.hasVersion | VoR | es_ES |
| dspace.entity.type | Publication |
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