Lazy Irrevocability for Best-Effort Transactional Memory Systems

dc.centroE.T.S.I. Informáticaes_ES
dc.contributor.authorQuislant-del-Barrio, Ricardo
dc.contributor.authorGutiérrez-Carrasco, Eladio Damián
dc.contributor.authorLópez-Zapata, Emilio
dc.contributor.authorPlata-González, Óscar Guillermo
dc.date.accessioned2024-09-25T17:40:59Z
dc.date.available2024-09-25T17:40:59Z
dc.date.issued2017
dc.departamentoArquitectura de Computadores
dc.description.abstractIBM and Intel now offer commercial systems with Transactional Memory (TM), a programming paradigm whose aim is to facilitate concurrent programming while maximizing parallelism. These TM systems are implemented in hardware and provide a software fallback path to overcome the hardware implementation limitations. They are known as best-effort hardware TM (BE-HTM) systems. The software fallback path must be provided by the user to ensure forward progress, which adds programming complexity to the TM paradigm. We propose a new type of irrevocability (a transactional mode that marks transactions as non-abortable) to deal with BE-HTM limitations in a more efficient manner, and to liberate the user from having to program a fallback path. It is based on the concept of lazy subscription used in the context of software fallback paths, where the fallback lock is checked at the end of the transaction instead of at the beginning. We propose a hardware lazy irrevocability mechanism that does not involve changes in the coherence protocol. It solves the unsafe execution problem of premature commits associated with lazy subscription fallbacks, and can be triggered by the user via an ISA extension, for the sake of versatility. It is compared with its software counterpart, which we propose as an enhanced lazy single global lock with escaped spinning at the end of the transaction. We also propose the lazy irrevocability with anticipation, a mechanism that cannot be implemented in software, which significantly improves the performance of codes with multiple cache evictions of transactional data. The evaluation of the proposals is carried out with the Simics/GEMS simulator along with the STAMP benchmark suite, and we obtain speedups from 14 to 28 percent over the fallback path approaches.es_ES
dc.identifier.citationRicardo Quislant; Eladio Gutierrez; Emilio L. Zapata; Oscar Plata. Lazy Irrevocability for Best-Effort Transactional Memory Systems. IEEE Transactions on Parallel and Distributed Systems. 28, pp. 1919 - 1932. 2017.es_ES
dc.identifier.doi10.1109/TPDS.2016.2638815
dc.identifier.urihttps://hdl.handle.net/10630/33324
dc.language.isospaes_ES
dc.publisherIEEEes_ES
dc.rights.accessRightsopen accesses_ES
dc.subjectLenguajes de programaciónes_ES
dc.subject.otherBest-effort Hardware Transactional Memoryes_ES
dc.subject.otherIrrevocabilityes_ES
dc.subject.otherLazy Subscriptiones_ES
dc.subject.otherTransaction Fallback Pathes_ES
dc.titleLazy Irrevocability for Best-Effort Transactional Memory Systemses_ES
dc.typejournal articlees_ES
dc.type.hasVersionAMes_ES
dspace.entity.typePublication
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relation.isAuthorOfPublication.latestForDiscoveryc6edf3ab-5134-4c07-943b-bfca90d13f34

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