Pipeline template for streaming applications on heterogeneous chips

dc.centroE.T.S.I. de Telecomunicaciónes_ES
dc.contributor.authorRodríguez, Andrés
dc.contributor.authorGonzález-Navarro, María Ángeles
dc.contributor.authorAsenjo-Plaza, Rafael
dc.contributor.authorCorbera-Peña, Francisco Javier
dc.contributor.authorVilches Reina, Antonio
dc.contributor.authorGarzarán, María
dc.date.accessioned2015-09-07T10:09:25Z
dc.date.available2015-09-07T10:09:25Z
dc.date.created2015
dc.date.issued2015-09-07
dc.departamentoArquitectura de Computadores
dc.description.abstractWe address the problem of providing support for executing single streaming applications implemented as a pipeline of stages that run on heterogeneous chips comprised of several cores and one on-chip GPU. In this paper, we mainly focus on the API that allows the user to specify the type of parallelism exploited by each pipeline stage running on the multicore CPU, the mapping of the pipeline stages to the devices (GPU or CPU), and the number of active threads. We use a real streaming application as a case of study to illustrate the experimental results that can be obtained with this API. With this example, we evaluate how the different parameter values affect the performance and energy efficiency of a heterogenous on-chip processor (Exynos 5 Octa) that has three different computational cores: a GPU, an ARM Cortex-A15 quad-core, and an ARM Cortex-A7 quad-core.es_ES
dc.description.sponsorshipUniversidad de Málaga. Campus de Excelencia Internacional Andalucía Tech. Proyecto de Excelencia de la Junta de Andalucía P11-TIC-08144.es_ES
dc.identifier.orcidhttp://orcid.org/0000-0002-1570-3863es_ES
dc.identifier.urihttp://hdl.handle.net/10630/10213
dc.language.isoenges_ES
dc.relation.eventdate1/9/2015es_ES
dc.relation.eventplaceEdimburgo, UKes_ES
dc.relation.eventtitleConference on Parallel Computing (ParCo)es_ES
dc.rightsby-nc-nd
dc.rights.accessRightsopen accesses_ES
dc.subjectProgramación en paralelo (Informática)es_ES
dc.subject.otherParallel Pipelinees_ES
dc.subject.otherHeterogenous chipses_ES
dc.subject.otherOn-chip GPUes_ES
dc.subject.otherPerformance-Energy efficiencyes_ES
dc.titlePipeline template for streaming applications on heterogeneous chipses_ES
dc.typeconference outputes_ES
dspace.entity.typePublication
relation.isAuthorOfPublication0857b903-5728-47c9-b298-a203bf081d23
relation.isAuthorOfPublication6ea008bf-69ee-4104-a942-2033b5b07ab8
relation.isAuthorOfPublication8ab59ac8-5b1b-4235-8f6c-b69120dc89e1
relation.isAuthorOfPublication.latestForDiscovery0857b903-5728-47c9-b298-a203bf081d23

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