RT Conference Proceedings
T1 Optimizing DSP Circuits by a New Family of Arithmetic Operators
A1 Hormigo-Aguilar, Javier
A1 Villalba-Moreno, Julio
K1 Aritmética computacional
AB A new family of arithmetic operators to optimizethe implementation of circuits for digital signal processing is presented. Thanks to use of a new technique which reduces the quantification errors, the proposed operators may decrease significantly the size of the circuits required for most applications. That means a simultaneous reduction of area, delay and power consumption.
YR 2014
FD 2014-11-19
LK http://hdl.handle.net/10630/8443
UL http://hdl.handle.net/10630/8443
LA eng
NO IEEE Signal Processing Society
NO Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech.
DS RIUMA. Repositorio Institucional de la Universidad de Málaga
RD 4 mar 2026