RT Journal Article
T1 Direct interface circuits for resistive sensors affected by lead wire resistances
A1 Hidalgo-López, José Antonio
K1 Electrónica
K1 Circuitos de interfaces
K1 Cables eléctricos
K1 Detectores
AB This article proposes two novel circuits for the digital readout of resistive sensors with parasitic series resistances caused by the lead wire needed to connect remote sensors. Both circuits are based on so-called direct interface circuits (DICs). These circuits perform a resistance-to-time-to-digital conversion by adding some external components to a digital processors (DP). The new circuits are very simple since they only use a capacitor and two or three resistors, depending on the proposal. A single discharging of the capacitor provides two or three time measurements to estimate the resistance of the sensor, eliminating the influence of lead wire resistances. Using a single discharging process simultaneously reduces error sources, measurement time, and energy consumption. A circuit that uses an FPGA as DP to estimate resistances corresponding to several thermal sensors presents systematic errors below 0.15% or 0.12%, depending on the proposal, for a maximum measurement time of 1.09 ms.
PB Elsevier
YR 2023
FD 2023-08
LK https://hdl.handle.net/10630/27151
UL https://hdl.handle.net/10630/27151
LA eng
NO Hidalgo-López, J. A. (2023). Direct Interface Circuits for Resistive Sensors Affected by Lead Wire Resistances. Measurement, 113250.
NO This work was supported by the Spanish Government under contract PID2021-125091OB-I00. Funding for open access charge: Universidad de Málaga / CBUA.
DS RIUMA. Repositorio Institucional de la Universidad de Málaga
RD 21 ene 2026