RT Conference Proceedings
T1 Arquitectura HW para decodificador Two-Step SOVA con recorridos hacia atrás sistólicos
A1 Martín-Vega, Francisco-Javier
A1 López-Martínez, Francisco Javier
A1 Entrambasaguas-Muñoz, José Tomás
K1 Sistemas informáticos
AB In this paper, a novel SOVA (Soft-Output Viterbi algorithm) decoder using systolic arrays to carry out the trace-back method is presented. Systolic arrays are associated with high data rates and small resource requirements, so they are especially attractive for efficient hardware implementations. The proposed architecture offers excellent performance in terms of throughput and has been used to implement a turbo decoder compliant to the 3GPP-LTE specification.
YR 2012
FD 2012-09-12
LK https://hdl.handle.net/10630/23749
UL https://hdl.handle.net/10630/23749
LA spa
NO Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech.
DS RIUMA. Repositorio Institucional de la Universidad de Málaga
RD 20 ene 2026