RT Conference Proceedings
T1 Reducing overheads of dynamic scheduling on heterogeneous chips
A1 Corbera-Peña, Francisco Javier
A1 Rodríguez, Andrés
A1 Asenjo-Plaza, Rafael
A1 González-Navarro, María Ángeles
A1 Vilches Reina, Antonio
A1 Garzarán, María
K1 Arquitectura de ordenadores
AB In recent processor development, we have witnessed the integration of GPU and CPUs into a single chip. The result of this integration is a reduction of the data communication overheads. This enables an efficient collaboration of both devices in the execution of parallel workloads. In this work, we focus on the problem of efficiently scheduling chunks of iterations of parallel loops among the computing devices on the chip (the GPU and the CPU cores) in the context of irregular applications. In particular, we analyze the sources of overhead that the host thread experiments when a chunk of iterations is offloaded to the GPU while other threads are executing concurrently other chunks on the CPU cores. We carefully study these overheads on different processor architectures and operating systems using Barnes Hut as a study case representative of irregular applications. We also propose a set of optimizations to mitigate the overheads that arise in presence of oversubscription and take advantage of the different features of the heterogeneous architectures. Thanks to these optimizations we reduce Energy-Delay Product (EDP) by 18% and 84% on Intel Ivy Bridge and Haswell architectures, respectively, and by 57% on the Exynos big.LITTLE.
PB arXiv.org (Cornell University Library)
YR 2015
FD 2015-01-19
LK http://hdl.handle.net/10630/8706
UL http://hdl.handle.net/10630/8706
LA eng
NO http://arxiv.org/abs/1501.03336
NO Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech.
DS RIUMA. Repositorio Institucional de la Universidad de Málaga
RD 21 ene 2026