<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-06-01T19:53:40Z</responseDate><request verb="GetRecord" identifier="oai:riuma.uma.es:10630/16058" metadataPrefix="qdc">https://riuma.uma.es/rest/oai/request</request><GetRecord><record><header><identifier>oai:riuma.uma.es:10630/16058</identifier><datestamp>2026-02-03T11:12:36Z</datestamp><setSpec>com_10630_2254</setSpec><setSpec>col_10630_37953</setSpec></header><metadata><qdc:qualifieddc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:dcterms="http://purl.org/dc/terms/" xmlns:doc="http://www.lyncode.com/xoai" xmlns:qdc="http://dspace.org/qualifieddc/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://purl.org/dc/elements/1.1/ http://dublincore.org/schemas/xmls/qdc/2006/01/06/dc.xsd http://purl.org/dc/terms/ http://dublincore.org/schemas/xmls/qdc/2006/01/06/dcterms.xsd http://dspace.org/qualifieddc/ http://www.ukoln.ac.uk/metadata/dcmi/xmlschema/qualifieddc.xsd">
   <dc:title>Unbiased Rounding for HUB Floating-point Addition</dc:title>
   <dc:creator>Villalba-Moreno, Julio</dc:creator>
   <dc:creator>Hormigo-Aguilar, Javier</dc:creator>
   <dc:creator>González-Navarro, Sonia</dc:creator>
   <dc:subject>Arquitectura de ordenador</dc:subject>
   <dcterms:abstract>Half-Unit-Biased (HUB) is an emerging format&#xd;
based on shifting the represented numbers by half Unit in the&#xd;
Last Place. This format simplifies two’s complement and roundto-&#xd;
nearest operations by preventing any carry propagation. This&#xd;
saves power consumption, time and area. Taking into account&#xd;
that the IEEE floating-point standard uses an unbiased rounding&#xd;
as the default mode, this feature is also desirable for HUB&#xd;
approaches. In this paper, we study the unbiased rounding for&#xd;
HUB floating-point addition in both as standalone operation and&#xd;
within FMA. We show two different alternatives to eliminate the&#xd;
bias when rounding the sum results, either partially or totally.&#xd;
We also present an error analysis and the implementation results&#xd;
of the proposed architectures to help the designers to decide what&#xd;
their best option are.</dcterms:abstract>
   <dcterms:dateAccepted>2018-06-28T11:13:31Z</dcterms:dateAccepted>
   <dcterms:available>2018-06-28T11:13:31Z</dcterms:available>
   <dcterms:created>2018-06-28T11:13:31Z</dcterms:created>
   <dcterms:issued>2018-06-28</dcterms:issued>
   <dc:type>journal article</dc:type>
   <dc:identifier>https://hdl.handle.net/10630/16058</dc:identifier>
   <dc:language>eng</dc:language>
   <dc:rights>open access</dc:rights>
</qdc:qualifieddc>
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