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      <dc:title>Unbiased Rounding for HUB Floating-point Addition</dc:title>
      <dc:creator>Villalba-Moreno, Julio</dc:creator>
      <dc:creator>Hormigo-Aguilar, Javier</dc:creator>
      <dc:creator>González-Navarro, Sonia</dc:creator>
      <dc:subject>Arquitectura de ordenador</dc:subject>
      <dc:description>Copyright (c) 2018 IEEE doi:10.1109/TC.2018.2807429</dc:description>
      <dc:description>Half-Unit-Biased (HUB) is an emerging format&#xd;
based on shifting the represented numbers by half Unit in the&#xd;
Last Place. This format simplifies two’s complement and roundto-&#xd;
nearest operations by preventing any carry propagation. This&#xd;
saves power consumption, time and area. Taking into account&#xd;
that the IEEE floating-point standard uses an unbiased rounding&#xd;
as the default mode, this feature is also desirable for HUB&#xd;
approaches. In this paper, we study the unbiased rounding for&#xd;
HUB floating-point addition in both as standalone operation and&#xd;
within FMA. We show two different alternatives to eliminate the&#xd;
bias when rounding the sum results, either partially or totally.&#xd;
We also present an error analysis and the implementation results&#xd;
of the proposed architectures to help the designers to decide what&#xd;
their best option are.</dc:description>
      <dc:date>2018-06-28T11:13:31Z</dc:date>
      <dc:date>2018-06-28T11:13:31Z</dc:date>
      <dc:date>2018</dc:date>
      <dc:date>2018-06-28</dc:date>
      <dc:type>journal article</dc:type>
      <dc:identifier>https://hdl.handle.net/10630/16058</dc:identifier>
      <dc:language>eng</dc:language>
      <dc:rights>open access</dc:rights>
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