<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-06-01T02:18:06Z</responseDate><request verb="GetRecord" identifier="oai:riuma.uma.es:10630/28879" metadataPrefix="qdc">https://riuma.uma.es/rest/oai/request</request><GetRecord><record><header><identifier>oai:riuma.uma.es:10630/28879</identifier><datestamp>2026-02-03T11:03:43Z</datestamp><setSpec>com_10630_2254</setSpec><setSpec>col_10630_37953</setSpec></header><metadata><qdc:qualifieddc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:dcterms="http://purl.org/dc/terms/" xmlns:doc="http://www.lyncode.com/xoai" xmlns:qdc="http://dspace.org/qualifieddc/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://purl.org/dc/elements/1.1/ http://dublincore.org/schemas/xmls/qdc/2006/01/06/dc.xsd http://purl.org/dc/terms/ http://dublincore.org/schemas/xmls/qdc/2006/01/06/dcterms.xsd http://dspace.org/qualifieddc/ http://www.ukoln.ac.uk/metadata/dcmi/xmlschema/qualifieddc.xsd">
   <dc:title>HUB meets posit: arithmetic units implementation</dc:title>
   <dc:creator>Murillo, Raul</dc:creator>
   <dc:creator>Hormigo-Aguilar, Javier</dc:creator>
   <dc:creator>del Barrio, Alberto A.</dc:creator>
   <dc:creator>Botella, Guillermo</dc:creator>
   <dc:subject>Hardware</dc:subject>
   <dcterms:abstract>The posit (TM) format was introduced in 2017 as an alternative to replacing the widespread IEEE 754. Posit&#xd;
arithmetic provides reproducible results across platforms and possesses tapered accuracy, among other improvements.&#xd;
Nevertheless, despite the advantages provided by such a format, their functional units are not as competitive as the IEEE 754 ones yet. The HUB approach was presented in 2016 to reduce the hardware cost of floating-point units. In this brief, we present HUB posit, a new format to mitigate the hardware overhead of posit units. Results show that it is possible to reach up to 15% and 12% in terms of area-delay product for adders and multipliers, respectively, while maintaining a similar level of accuracy. In addition, synthesis results show that HUB posit units are able to reach higher frequencies than conventional ones.</dcterms:abstract>
   <dcterms:dateAccepted>2024-01-18T11:39:53Z</dcterms:dateAccepted>
   <dcterms:available>2024-01-18T11:39:53Z</dcterms:available>
   <dcterms:created>2024-01-18T11:39:53Z</dcterms:created>
   <dcterms:issued>2023</dcterms:issued>
   <dc:type>journal article</dc:type>
   <dc:identifier>R. Murillo, J. Hormigo, A. A. D. Barrio and G. Botella, "HUB Meets Posit: Arithmetic Units Implementation," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 1, pp. 440-444, Jan. 2024, doi: 10.1109/TCSII.2023.3307488.</dc:identifier>
   <dc:identifier>1558-3791</dc:identifier>
   <dc:identifier>https://hdl.handle.net/10630/28879</dc:identifier>
   <dc:identifier>10.1109/TCSII.2023.3307488</dc:identifier>
   <dc:language>eng</dc:language>
   <dc:relation>Vol. 71;1</dc:relation>
   <dc:rights>http://creativecommons.org/licenses/by-nc-sa/4.0/</dc:rights>
   <dc:rights>open access</dc:rights>
   <dc:rights>Atribución-NoComercial-CompartirIgual 4.0 Internacional</dc:rights>
   <dc:publisher>IEEE</dc:publisher>
</qdc:qualifieddc>
</metadata></record></GetRecord></OAI-PMH>