• Adaptive Partition Strategies for Loop Parallelism in Heterogeneous Architectures 

      Vilches, Antonio; Asenjo-Plaza, Rafael; Corbera, Francisco; Navarro, Ángeles (2014-07-30)
      This paper explores the possibility of efficiently using multicores in conjunction with multiple GPU accelerators under a parallel task programming paradigm. In particular, we address the challenge of extending a ...
    • An Experience of e-assessment in an Introductory Course on Computer Organization 

      Ramos-Cozar, Julian; Gutierrez-Carrasco, Eladio Damian; Trenas-Castro, Maria Antonia; Corbera, Francisco; Romero-Montiel, Sergio (2013-11-13)
      This work describes how the CTPracticalsMoodle module can be used for e-assessment in an introductory course on computer organization, where the practical content consists of the design and simulation of a basic CPU ...
    • Efficient Floating-Point Representation for Balanced Codes for FPGA Devices 

      Villalba-Moreno, Julio; Hormigo-Aguilar, Javier; Corbera, Francisco; Gonzalez, Mario; López-Zapata, Emilio (2013-10-30)
      We propose a floating–point representation to deal efficiently with arithmetic operations in codes with a balanced number of additions and multiplications for FPGA devices. The variable shift operation is very slow in ...
    • Patrón pipeline aplicado a arquitecturas heterogéneas big.LITTLE 

      Vilches, Antonio; Rodriguez-Moreno, Andres; Navarro, Ángeles; Corbera, Francisco; Asenjo-Plaza, Rafael (2015-09-25)
      En este trabajo, proponemos una solución para permitir la ejecución de aplicaciones de tipo streaming, que constan de una serie de etapas, sobre arquitecturas heterogéneas con un multicore y una GPU integrada. Para ello, ...
    • Pipeline template for streaming applications on heterogeneous chips 

      Rodríguez, Andrés; Navarro, Ángeles; Asenjo-Plaza, Rafael; Corbera, Francisco; Vilches, Antonio; [et al.] (2015-09-07)
      We address the problem of providing support for executing single streaming applications implemented as a pipeline of stages that run on heterogeneous chips comprised of several cores and one on-chip GPU. In this paper, ...
    • Prácticas de ensamblador basadas en Raspberry Pi 

      Villena Godoy, Antonio José; Asenjo-Plaza, Rafael; Corbera, Francisco (2015-09-07)
      Este trabajo se enmarca dentro del Proyecto de Innovación Educativa PIE13-082, “Motivando al alumno de ingeniería mediante la plataforma Raspberry Pi” cuyo principal objetivo es aumentar el grado de motivación del alumno ...
    • Reducing overheads of dynamic scheduling on heterogeneous chips 

      Corbera, Francisco; Rodríguez, Andrés; Asenjo-Plaza, Rafael; Navarro, Ángeles; Vilches, Antonio; [et al.] (arXiv.org (Cornell University Library), 2015-01-19)
      In recent processor development, we have witnessed the integration of GPU and CPUs into a single chip. The result of this integration is a reduction of the data communication overheads. This enables an efficient collaboration ...
    • Scheduling strategies for parallel patterns on heterogeneous architectures 

      Vilches Reina, Antonio (UMA Editorial, 2017)
      During the last decade, power consumption and energy efficiency have become key aspects in processor design. Nowadays, the power consumption is the principal limitation for further scaling of chip multiprocessors design ...
    • Solving Large-Scale Markov Decision Processes on Low-Power Heterogeneous Platforms 

      Constantinescu, Denisa-Andreea; Gonzalez-Navarro, Maria Angeles; Corbera, Francisco; Fernández-Madrigal, Juan Antonio; Asenjo-Plaza, Rafael (2019-07-11)
      Markov Decision Processes (MDPs) provide a framework for a machine to act autonomously and intelligently in environments where the effects of its actions are not deterministic. MDPs have numerous applications. We focus ...