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dc.contributor.authorVillalba-Moreno, Julio 
dc.date.accessioned2016-07-21T10:23:59Z
dc.date.available2016-07-21T10:23:59Z
dc.date.created2016
dc.date.issued2016-07-21
dc.identifier.urihttp://hdl.handle.net/10630/11872
dc.description.abstractHalf-Unit-Biased format is based on shifting the representation line of the binary numbers by half Unit in the Last Place. The main feature of this format is that the round to nearest is carried out by a simple truncation, preventing any carry propagation and saving time and area. Algorithms and architectures have been defined for addition/substraction and multiplication operations under this format. Nevertheless, the division operation has not been confronted yet. In this paper we deal with the floating-point division under HUB format, studying the architecture for the digit recurrence method, including the on-the-fly conversion of the signed digit quotient.es_ES
dc.description.sponsorshipUniversidad de Málaga. Campus de Excelencia Internacional Andalucía Tech.es_ES
dc.language.isoenges_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.subjectAritmética computacionales_ES
dc.subject.otherDigit recurrence divisiones_ES
dc.subject.otherHUBes_ES
dc.titleDigit recurence division under HUB formates_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.centroE.T.S.I. Industriales_ES
dc.relation.eventtitle23rd IEEE Symposium on Computer Arithmetices_ES
dc.relation.eventplaceSilicon Valley, Califoria USAes_ES
dc.relation.eventdate10-07-2016es_ES
dc.cclicenseby-nc-ndes_ES


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