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dc.contributor.authorUjaldon-Martínez, Manuel 
dc.date.accessioned2016-09-13T11:55:42Z
dc.date.available2016-09-13T11:55:42Z
dc.date.created2016
dc.date.issued2016-09-13
dc.identifier.urihttp://hdl.handle.net/10630/11999
dc.descriptionArtículo invitado, publicado en las actas del congreso por IEEE Society Press. Páginas 320 a 328. ISBN: 978-1-5090-3593-9.DOI 10.1109/CSE-EUC-DCABES-2016.203es_ES
dc.description.abstractAfter a decade evolving in the High Performance Computing arena, GPU-equipped supercomputers have con- quered the top500 and green500 lists, providing us unprecedented levels of computational power and memory bandwidth. This year, major vendors have introduced new accelerators based on 3D memory, like Xeon Phi Knights Landing by Intel and Pascal architecture by Nvidia. This paper reviews hardware features of those new HPC accelerators and unveils potential performance for scientific applications, with an emphasis on Hybrid Memory Cube (HMC) and High Bandwidth Memory (HBM) used by commercial products according to roadmaps already announced.es_ES
dc.description.sponsorshipUniversidad de Málaga. Campus de Excelencia Internacional Andalucia Teches_ES
dc.language.isoenges_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.subjectSuperordenadoreses_ES
dc.subject.otherCUDAes_ES
dc.subject.otherGPUes_ES
dc.subject.otherHPCes_ES
dc.subject.otherMemoria 3Des_ES
dc.titleHPC Accelerators with 3D Memoryes_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.centroE.T.S.I. Informáticaes_ES
dc.relation.eventtitle19th IEEE International Conference on Computational Science and Engineering (CSE'16)es_ES
dc.relation.eventplaceParís (Francia)es_ES
dc.relation.eventdate24 Agosto de 2016es_ES
dc.cclicenseby-nc-ndes_ES


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