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dc.contributor.authorVillalba, Julio
dc.contributor.authorHormigo, Javier
dc.contributor.authorGonzález-Navarro, Sonia
dc.contributor.authorVillalba-Moreno, Julio 
dc.contributor.authorHormigo-Aguilar, Javier 
dc.contributor.authorGonzalez-Navarro, Sonia 
dc.date.accessioned2018-06-28T11:13:31Z
dc.date.available2018-06-28T11:13:31Z
dc.date.created2018
dc.date.issued2018-06-28
dc.identifier.urihttps://hdl.handle.net/10630/16058
dc.descriptionCopyright (c) 2018 IEEE doi:10.1109/TC.2018.2807429en_US
dc.description.abstractHalf-Unit-Biased (HUB) is an emerging format based on shifting the represented numbers by half Unit in the Last Place. This format simplifies two’s complement and roundto- nearest operations by preventing any carry propagation. This saves power consumption, time and area. Taking into account that the IEEE floating-point standard uses an unbiased rounding as the default mode, this feature is also desirable for HUB approaches. In this paper, we study the unbiased rounding for HUB floating-point addition in both as standalone operation and within FMA. We show two different alternatives to eliminate the bias when rounding the sum results, either partially or totally. We also present an error analysis and the implementation results of the proposed architectures to help the designers to decide what their best option are.en_US
dc.description.sponsorshipTIN2013-42253-P, TIN2016-80920-R, JA2012P12-TIC-1692en_US
dc.language.isoengen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectArquitectura de ordenadoren_US
dc.subject.otherHUB formaten_US
dc.subject.otherUnbiase roundingen_US
dc.titleUnbiased Rounding for HUB Floating-point Additionen_US
dc.typeinfo:eu-repo/semantics/preprinten_US
dc.centroE.T.S.I. Informáticaen_US


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