Listar AC - Artículos por autor "Villalba-Moreno, Julio"
Mostrando ítems 1-7 de 7
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Fast HUB Floating-point Adder for FPGA
Villalba-Moreno, Julio; Hormigo-Aguilar, Javier; González-Navarro, Sonia (2018-10-17)Several previous publications have shown the area and delay reduction when implementing real number computation using HUB formats for both floating-point and fixed-point. In this paper, we present a HUB floating-point ... -
Floating Point HUB Adder for RISC-V Sargantana Processor
Bandera-Burgueño, Gerardo; Salamero, Javier; Moreto, Miquel; Villalba-Moreno, Julio (Cornell University, 2023)HUB format is an emerging technique to improve the hardware and time requirement when round to nearest is needed. On the other hand, RISC-V is a open source ISA that an important number of companies are using in their ... -
High-Radix Formats for Enhancing Floating-Point FPGA Implementations
Villalba-Moreno, Julio; Hormigo-Aguilar, Javier (Springer, 2021-12-02)This article proposes a family of high-radix floating-point representation to efficiently deal with floating-point addition in FPGA devices with no native floating-point sup port. Since variable shifter implementation ... -
High-radix formats for enhancing floating-point FPGA implementations
Villalba-Moreno, Julio; Hormigo-Aguilar, Javier (Springer, 2022-03)This article proposes a family of high-radix floating-point representation to efficiently deal with floating-point addition in FPGA devices with no native floating-point support. Since variable shifter implementation ... -
Measuring Improvement when Using HUB Formats to Implement Floating-Point Systems under Round-to-Nearest
Hormigo-Aguilar, Javier; Villalba-Moreno, Julio (IEEE, 2016)This paper analyzes the benefits of using HUB formats to implement floating-point arithmetic under round-tonearest mode from a quantitative point of view. Using HUB formats to represent numbers allows the removal of the ... -
New formats for computing with real-numbers under round-to-nearest
Hormigo-Aguilar, Javier; Villalba-Moreno, Julio (2015-09-17)In this paper, a new family of formats to deal with real number for applications requiring round to nearest is proposed. They are based on shifting the set of exactly represented numbers which are used in conventional ... -
Unbiased Rounding for HUB Floating-point Addition
Villalba-Moreno, Julio; Hormigo-Aguilar, Javier; González-Navarro, Sonia (2018-06-28)Half-Unit-Biased (HUB) is an emerging format based on shifting the represented numbers by half Unit in the Last Place. This format simplifies two’s complement and roundto- nearest operations by preventing any carry ...