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dc.contributor.advisorPlata-González, Óscar Guillermo 
dc.contributor.advisorGutiérrez-Carrasco, Eladio Damián 
dc.contributor.authorFernández-Vega, Iván
dc.contributor.otherArquitectura de Computadoreses_ES
dc.date.accessioned2023-12-05T10:09:36Z
dc.date.available2023-12-05T10:09:36Z
dc.date.created2023-04-28
dc.date.issued2023
dc.date.submitted2023-06-30
dc.identifier.urihttps://hdl.handle.net/10630/28214
dc.description.abstractThe explosion of the Internet-Of-Things and Big Data era has resulted in the continuous generation of a very large amount of data, which is increasingly difficult to store and analyze. Such a collection of data is also referred to as a time series, a common data representation in almost every scientific discipline and business application. Time series analysis (TSA) splits the time series into subsequences of consecutive data points to extract valuable information. In this thesis, we characterize state-of-the-art TSA algorithms and find their bottlenecks in commodity computing platforms. We observe that the performance and energy efficiency of TSA algorithms are heavily burdened by data movement. Based on that, we propose software and hardware solutions to accelerate time series analysis and make its computation as energy-efficient as possible. To this end, we provide four contributions: PhiTSA, NATSA, MATSA and TraTSA. PhiTSA optimizes and characterizes state-of-the-art TSA algorithms in a many-core Intel Xeon Phi KNL platform. NATSA is a novel Processing-Near-Memory accelerator for TSA. This accelerator places custom floating-point processing units close to High-Bandwidth-Memory, exploiting its memory channels and the lower latency of accesses. MATSA is a novel Processing-Using-Memory accelerator for TSA, known as MATSA. The key idea is to exploit magneto-resistive memory crossbars to enable energy-efficient and fast time series computation in memory while overcoming endurance issues of other non-volatile memory technologies. Finally, TraTSA evaluates the benefits of applying Transprecision Computing to TSA, where the number of bits dedicated to floating-point operations is reduced.es_ES
dc.language.isoenges_ES
dc.publisherUMA Editoriales_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectAnálisis de series temporaleses_ES
dc.subjectOrdenadores - Memoriases_ES
dc.subjectArquitectura de ordenadores - Tesis doctoraleses_ES
dc.subject.otherTime series analysises_ES
dc.subject.otherMemory bound applicationses_ES
dc.subject.otherProcessing-in-memoryes_ES
dc.subject.otherTransprecision computinges_ES
dc.titleAccelerating Time Series Analysis via Near-Data-Processing Approacheses_ES
dc.typeinfo:eu-repo/semantics/doctoralThesises_ES
dc.centroEscuela de Ingenierías Industrialeses_ES
dc.rights.ccAttribution-NonCommercial-NoDerivatives 4.0 Internacional*


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