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dc.contributor.authorÁvila Ruiz, Juan Manuel
dc.contributor.authorMoreno-Pozas, Laureano 
dc.contributor.authorDurán Valdeiglesias, Elena
dc.contributor.authorMoscoso Mártir, Álvaro
dc.contributor.authorMolina-Fernández, Íñigo 
dc.contributor.authorDe-Oliva-Rubio, José 
dc.date.accessioned2024-09-25T06:35:40Z
dc.date.available2024-09-25T06:35:40Z
dc.date.issued2013
dc.identifier.citationÁvila-Ruiz, J.M., Moreno-Pozas, L., Durán-Valdeiglesias, E., Moscoso-Mártir, A., Molina-Fernández, I. and de-Oliva-Rubio, J. (2013), Frequency locked loop architecture for phase noise reduction in wideband low-noise microwave oscillators. IET Microw. Antennas Propag., 7: 869-875.es_ES
dc.identifier.urihttps://hdl.handle.net/10630/33120
dc.descriptionPolítica de acceso abierto tomada de: https://digital-library.theiet.org/files/Author_self-archiving_policy.pdfes_ES
dc.description.abstractA frequency locked loop (FLL) for phase noise reduction of wideband voltage controlled oscillators is proposed. The key building block of the system is a low noise (−160 dBV/Hz) and high sensitivity (22 V/GHz) delay line frequency discriminator with 5–8 GHz coverage, which makes use of a high performance multilayer hybrid. The authors derive closed-form, universal design equations for the maximum noise reduction and stability of the FLL circuitry. Application of the proposed technique to a state-of-the-art voltage controlled oscillator operating in the 5–8 GHz band yields a phase noise reduction of 8–10 dB at 100 kHz and 5 dB at 1 MHz off the carrier, which shows the results are in good agreement with the simulated results; so phase noise better than −107 dBc/Hz at 100 kHz and better than −123.5 dBc/Hz at 1 MHz is obtained.es_ES
dc.language.isoenges_ES
dc.publisherWileyes_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectMicroondases_ES
dc.subject.otherFrequency locked loopses_ES
dc.subject.otherPhase noisees_ES
dc.subject.otherWidebandes_ES
dc.subject.otherMicrowave oscillatorses_ES
dc.subject.otherLow-noisees_ES
dc.titleFrequency locked loop architecture for phase noise reduction in wideband low-noise microwave oscillators.es_ES
dc.typeinfo:eu-repo/semantics/articlees_ES
dc.centroE.T.S.I. Telecomunicaciónes_ES
dc.identifier.doi10.1049/iet-map.2013.0114
dc.rights.ccAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.type.hasVersioninfo:eu-repo/semantics/acceptedVersiones_ES


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