• Aceleración de Time-Series sismográficas en Python 

      López, Francisco; Grass, Thomas; Asenjo-Plaza, Rafael; Navarro, Ángeles (Miguel Angel Vega Rodríguez y Antonio J. Plaza Miguel, 2019)
      Python se ha convertido en un lenguaje de programación muy popular, pero también es uno de los menos eficientes en términos de prestaciones y consumo energético. Este artículo describe el proceso que hemos seguido para ...
    • Adaptive Partition Strategies for Loop Parallelism in Heterogeneous Architectures 

      Vilches, Antonio; Asenjo-Plaza, Rafael; Corbera, Francisco; Navarro, Ángeles (2014-07-30)
      This paper explores the possibility of efficiently using multicores in conjunction with multiple GPU accelerators under a parallel task programming paradigm. In particular, we address the challenge of extending a ...
    • Algoritmos paralelos de memoria compartida que determinan el menor tama˜no de un ´arbol binario al refinar un simplex regular 

      Aparicio, Guillermo; Salmerón, José Manuel; González-Casado, Leocadio; Asenjo-Plaza, Rafael; García-Fernández, Inmaculada; [et al.] (2015-10-05)
      En el ambito de la optimizacion global basada en tecnicas de ramificacion y acotacion, cuando el espacio de busqueda es un n-sımplex regular es habitual utilizar como regla de division la biseccion por el lado mayor, ...
    • Energy Efficiency of Software Transactional Memory in a Heterogeneous Architecture 

      Villegas, Emilio; Villegas, Alejandro; Navarro, Angeles; Asenjo-Plaza, Rafael; Ukidave, Yash; [et al.] (2016-09-07)
      Hardware vendors make an important effort creating low-power CPUs that keep battery duration and durability above acceptable levels. In order to achieve this goal and provide good performance-energy for a wide variety of ...
    • Evaluación del consumo energético de la memoria transaccional en procesadores heterogéneos 

      Villegas, Emilio; Villegas, Alejandro; Navarro, Angeles; Asenjo-Plaza, Rafael; Plata, Oscar (2016)
      Actualmente existe una enorme cantidad de dispositivos y sistemas, como ordenadores portátiles y teléfonos móviles, que dependen de una batería para su funcionamiento. Como consecuencia, el hardware que incorporan debe ser ...
    • Expressing Heterogeneous Parallelism in C++ with Threading Building Blocks 

      Reinders, James; Voss, Michael J.; Reble, Pablo; Asenjo-Plaza, Rafael (2017-12-18)
      Due to energy constraints, high performance computing platforms are becoming increasingly heterogeneous, achieving greater performance per watt through the use of hardware that is tuned to specific computational kernels ...
    • Hardware support for Local Memory Transactions on GPU Architectures 

      Villegas, Alejandro; Navarro, Ángeles; Asenjo-Plaza, Rafael; Plata, Oscar; Ubal, Rafael; [et al.] (2015-06-26)
      Graphics Processing Units (GPUs) are popular hardware accelerators for data-parallel applications, enabling the execution of thousands of threads in a Single Instruction - Multiple Thread (SIMT) fashion. However, the SIMT ...
    • Hardware support for scratchpad memory transactions on GPU architectures 

      Villegas, Alejandro; Asenjo-Plaza, Rafael; Navarro, Angeles; Plata, Oscar; Ubal, Rafael; [et al.] (Springer, 2017-08-29)
      Graphics Processing Units (GPUs) have become the accelerator of choice for data-parallel applications, enabling the execution of thousands of threads in a Single Instruction - Multiple Thread (SIMT) fashion. Using OpenCL ...
    • Improvements in Hardware Transactional Memory for GPU Architectures 

      Villegas, Alejandro; Asenjo-Plaza, Rafael; Navarro, Ángeles; Plata, Oscar (2016-07-20)
      In the multi-core CPU world, transactional memory (TM)has emerged as an alternative to lock-based programming for thread synchronization. Recent research proposes the use of TM in GPU architectures, where a high number of ...
    • An Introduction to Intel Threading Building Blocks and its Support for Heterogeneous Programming 

      Asenjo Plaza, Rafael; Cownie, Jim; Fedotov, Aleksei (2018-03-12)
      Due to energy constraints, high performance computing platforms are becoming increasingly heterogeneous, achieving greater performance per watt through the use of hardware that is tuned to specific computational kernels ...
    • Memoria Transaccional Hardware en Memoria Local de GPU 

      Villegas, Alejandro; Navarro, Ángeles; Asenjo-Plaza, Rafael; Plata, Oscar (2015-09-25)
      Los aceleradores gráficos (GPUs) se han convertido en procesadores de prop ́osito general muy populares para el cómputo de aplicaciones que presen- tan un gran paralelismo de datos. Su modelo de ejecución SIMT (Single ...
    • Memoria Transaccional Software en Procesadores CPU+GPU Heterogéneos 

      Navarro, Angeles; Asenjo-Plaza, Rafael; Plata-Gonzalez, Oscar Guillermo; Villegas, Alejandro (2018-09-19)
      En los procesadores multi-núcleo, la memoria transaccional (TM) ha aparecido como una alternativa prometedora a las técnicas basadas en cerrojos para garantizar exclusión mutua y está siendo incluida como parte de procesadores ...
    • On the parallelization of a three-parametric log-logistic estimation algorithm 

      Asenjo-Plaza, Rafael; Rodríguez, Andrés; Navarro, Ángeles; Fernández-Madrigal, Juan Antonio; Cruz-Martin, Ana Maria (2014-09-25)
      Networked telerobots transmit data from its sensors to the remote controller. To provide guarantees on the time requirements of these systems it is mandatory to keep the transmission time delays below a given threshold, ...
    • Patrón pipeline aplicado a arquitecturas heterogéneas big.LITTLE 

      Vilches, Antonio; Rodriguez, Andres; Navarro, Ángeles; Corbera, Francisco; Asenjo-Plaza, Rafael (2015-09-25)
      En este trabajo, proponemos una solución para permitir la ejecución de aplicaciones de tipo streaming, que constan de una serie de etapas, sobre arquitecturas heterogéneas con un multicore y una GPU integrada. Para ello, ...
    • Pipeline template for streaming applications on heterogeneous chips 

      Rodríguez, Andrés; Navarro, Ángeles; Asenjo-Plaza, Rafael; Corbera, Francisco; Vilches, Antonio; [et al.] (2015-09-07)
      We address the problem of providing support for executing single streaming applications implemented as a pipeline of stages that run on heterogeneous chips comprised of several cores and one on-chip GPU. In this paper, ...
    • Reducing overheads of dynamic scheduling on heterogeneous chips 

      Corbera, Francisco; Rodríguez, Andrés; Asenjo-Plaza, Rafael; Navarro, Ángeles; Vilches, Antonio; [et al.] (arXiv.org (Cornell University Library), 2015-01-19)
      In recent processor development, we have witnessed the integration of GPU and CPUs into a single chip. The result of this integration is a reduction of the data communication overheads. This enables an efficient collaboration ...
    • Solving Large-Scale Markov Decision Processes on Low-Power Heterogeneous Platforms 

      Constantinescu, Denisa-Andreea; Gonzalez-Navarro, Maria Angeles; Corbera, Francisco; Fernández-Madrigal, Juan Antonio; Asenjo-Plaza, Rafael (2019-07-11)
      Markov Decision Processes (MDPs) provide a framework for a machine to act autonomously and intelligently in environments where the effects of its actions are not deterministic. MDPs have numerous applications. We focus ...
    • Time Series Heterogeneous Co-execution on CPU+GPU 

      Romero, José Carlos; Gonzalez-Navarro, Maria Angeles; Rodriguez-Moreno, Andres; Asenjo-Plaza, Rafael; Cole, Murray (2019-07-10)
      Time series motif (similarities) and discords discovery is one of the most important and challenging problems nowadays for time series analytics. We use an algorithm called “scrimp” that excels in collecting the relevant ...
    • Towards a Software Transactional Memory for heterogeneous CPU-GPU processors 

      Villegas, Alejandro; Navarro, Angeles; Asenjo-Plaza, Rafael; Plata, Oscar (2017-09-15)
      The heterogeneous Accelerated Processing Units (APUs) integrate a multi-core CPU and a GPU within the same chip. Modern APUs provide the programmer with platform atomics, used to communicate the CPU cores with the GPU using ...