• Efficient Floating-Point Representation for Balanced Codes for FPGA Devices 

      Villalba-Moreno, Julio; Hormigo-Aguilar, Javier; Corbera, Francisco; Gonzalez, Mario; López-Zapata, Emilio (2013-10-30)
      We propose a floating–point representation to deal efficiently with arithmetic operations in codes with a balanced number of additions and multiplications for FPGA devices. The variable shift operation is very slow in ...
    • Reproducible SUmmation under HUB Format 

      Villalba-Moreno, Julio; Hormigo-Aguilar, Javier; Jaime Rodriguez, Francisco Jose
      Floating point reproducibility is a property claimed by programmers and end users. Half-Unit-Biased (HUB) is a new representation format in which the round to nearest is carried out by truncation, preventing any ...
    • Simplified Floating-Point Units for High Dynamic Range Image and Video Systems 

      Hormigo-Aguilar, Javier; Villalba-Moreno, Julio (2015-06-29)
      The upcoming arrival of high dynamic range image and video applications to consumer electronics will force the utilization of floating-point numbers on them. This paper shows that introducing a slight modification on ...