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dc.contributor.authorVillegas Fernández, Alejandro
dc.contributor.authorGonzález-Navarro, María Ángeles 
dc.contributor.authorAsenjo-Plaza, Rafael 
dc.contributor.authorPlata-González, Óscar Guillermo 
dc.contributor.authorUbal, Rafael
dc.contributor.authorKaeli, David
dc.date.accessioned2015-06-26T07:59:30Z
dc.date.available2015-06-26T07:59:30Z
dc.date.created2015
dc.date.issued2015-06-26
dc.identifier.urihttp://hdl.handle.net/10630/9961
dc.description.abstractGraphics Processing Units (GPUs) are popular hardware accelerators for data-parallel applications, enabling the execution of thousands of threads in a Single Instruction - Multiple Thread (SIMT) fashion. However, the SIMT execution model is not efficient when code includes critical sections to protect the access to data shared by the running threads. In addition, GPUs offer two shared spaces to the threads, local memory and global memory. Typical solutions to thread synchronization include the use of atomics to implement locks, the serialization of the execution of the critical section, or delegating the execution of the critical section to the host CPU, leading to suboptimal performance. In the multi-core CPU world, transactional memory (TM) was proposed as an alternative to locks to coordinate concurrent threads. Some solutions for GPUs started to appear in the literature. In contrast to these earlier proposals, our approach is to design hardware support for TM in two levels. The first level is a fast and lightweight solution for coordinating threads that share the local memory, while the second level coordinates threads through the global memory. In this paper we present GPU-LocalTM as a hardware TM (HTM) support for the first level. GPU-LocalTM offers simple conflict detection and version management mechanisms that minimize the hardware resources required for its implementation. For the workloads studied, GPU-LocalTM provides between 1.25-80X speedup over serialized critical sections, while the overhead introduced by transaction management is lower than 20%.es_ES
dc.description.sponsorshipUniversidad de Málaga. Campus de Excelencia Internacional Andalucía Tech.es_ES
dc.language.isoenges_ES
dc.rightsinfo:eu-repo/semantics/openAccesses_ES
dc.subjectIngeniería de ordenadoreses_ES
dc.subject.otherTransactional memoryes_ES
dc.subject.otherGPUes_ES
dc.titleHardware support for Local Memory Transactions on GPU Architectureses_ES
dc.typeinfo:eu-repo/semantics/conferenceObjectes_ES
dc.centroE.T.S.I. Informáticaes_ES
dc.relation.eventtitle10th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT 2015)es_ES
dc.relation.eventplacePortland, Oregon, USAes_ES
dc.relation.eventdateJune, 2015es_ES
dc.rights.ccby-nc-nd


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